Atomera
Recent Patents
Filed a patent for "non-volatile memory including a depletion layer with a superlattice and related methods" on Fri, September 1, 2023
New US PatentFiled a patent for "complementary field effect transistor (cfet) devices including superlattice isolation layer and related methods" on Wed, August 2, 2023
New US PatentFiled a patent for "devices including gettering layer and related methods" on Mon, July 3, 2023
New US PatentFiled a patent for "methods for making semiconductor devices including localized semiconductor-on-insulator (soi) regions" on Wed, May 3, 2023
New US PatentFiled a patent for "dmos devices and related methods" on Mon, May 8, 2023
New US PatentFiled a patent for "methods for making semiconductor devices including localized semiconductor-on-insulator (soi) regions" on Thu, November 7, 2024
New US PatentFiled a patent for "semiconductor devices including localized semiconductor-on-insulator (soi) regions" on Thu, November 7, 2024
New US PatentFiled a patent for "method for making dmos devices including a superlattice and field plate for drift region diffusion" on Thu, November 14, 2024
New US PatentFiled a patent for "dmos devices including a superlattice and field plate for drift region diffusion" on Thu, November 14, 2024
New US PatentFiled a patent for "method for making a radio frequency silicon-on-insulator (rfsoi) wafer including a superlattice" on Tue, March 14, 2023
New US PatentFiled a patent for "nanostructure transistors with source/drain dopant blocking structures including a superlattice and related methods" on Fri, March 24, 2023
New US PatentFiled a patent for "nanostructure transistors with source/drain dopant blocking structures including a superlattice and related methods" on Mon, June 12, 2023
New US PatentFiled a patent for "method for making a radio frequency silicon-on-insulator (rfsoi) wafer including a superlattice" on Thu, September 19, 2024
New US PatentFiled a patent for "method for making nanostructure transistors with source/drain trench contact liners" on Thu, September 26, 2024
New US PatentFiled a patent for "nanostructure transistors with source/drain trench contact liners" on Thu, September 26, 2024
New US PatentFiled a patent for "nanostructure transistors with offset source/drain dopant blocking structures including a superlattice" on Thu, September 26, 2024
New US PatentFiled a patent for "method for making nanostructure transistors with flush source/drain dopant blocking structures including a superlattice" on Thu, September 26, 2024
New US PatentFiled a patent for "nanostructure transistors with flush source/drain dopant blocking structures including a superlattice" on Thu, September 26, 2024
New US PatentFiled a patent for "method for making nanostructure transistors with offset source/drain dopant blocking structures including a superlattice" on Thu, September 26, 2024
New US PatentFiled a patent for "radio frequency (rf) semiconductor devices including a ground plane layer having a superlattice" on Thu, September 26, 2024
New US PatentFiled a patent for "radio frequency silicon-on-insulator (rfsoi) structure including a superlattice and related methods" on Fri, March 10, 2023
New US PatentFiled a patent for "method for making radio frequency silicon-on-insulator (rfsoi) structure including a superlattice" on Thu, September 12, 2024
New US PatentFiled a patent for "methods for making radio frequency (rf) semiconductor devices including a ground plane layer having a superlattice" on Thu, September 12, 2024
New US PatentFiled a patent for "methods for making bipolar junction transistors including emitter-base and base-collector superlattices" on Thu, July 25, 2024
New US PatentFiled a patent for "dynamic random access memory system including single-ended sense amplifiers and methods for operating same" on Thu, July 4, 2024
New US Patent