Cadence Design Systems

Filed a patent for "automated printed circuit board component clustering" on Thu, February 13, 2025

Filed a patent for "system and method for verifying a cross-connection of lanes in a multi-lane environment using a single testbench" on Fri, April 21, 2023

Filed a patent for "wireline receiver sampling circuit" on Tue, June 6, 2023

Filed a patent for "system and method for creating a high-level parameter relational data model for memory configurability solutions" on Thu, June 22, 2023

Filed a patent for "thin-oxide voltage level shifter" on Mon, December 5, 2022

Filed a patent for "system and method for glitch debugging" on Thu, September 19, 2024

Filed a patent for "3d stacked die testing structure" on Fri, February 24, 2023

Filed a patent for "signal receiver with skew-tolerant strobe gating" on Tue, June 21, 2022

Filed a patent for "methods and circuits for decision-feedback equalization with early high-order-symbol detection" on Thu, December 22, 2022

Filed a patent for "methods and circuits for decision-feedback equalization using compensated decision regions" on Thu, December 22, 2022

Filed a patent for "edge enhancement for signal transmitter" on Thu, January 5, 2023

Filed a patent for "low power current mode logic" on Thu, July 28, 2022

Filed a patent for "read eye training" on Thu, February 16, 2023

Filed a patent for "fragmented periodic timing calibration" on Thu, August 24, 2023

Filed a patent for "method and system for debugging metastability in digital circuits" on Thu, September 22, 2022

Filed a patent for "multi-stage equalizer for inter-symbol interference cancellation" on Thu, April 20, 2023

Filed a patent for "voltage controlled oscillator (vco) with adaptive temperature compensation" on Tue, November 8, 2022

Filed a patent for "matched digital-to-analog converters" on Thu, May 25, 2023

Filed a patent for "high-speed serial link signal chain" on Tue, January 3, 2023

Filed a patent for "baud-rate clock recovery lock point control" on Thu, August 10, 2023

Filed a patent for "pattern detection based parameter adaptation" on Thu, July 20, 2023

Filed a patent for "efficient storage of error correcting code information" on Thu, August 31, 2023

Filed a patent for "live offset cancellation of the decision feedback equalization data slicers" on Thu, November 30, 2023

Filed a patent for "signaling compression and decompression associated with a partially unrolled decision feedback equalizer (dfe)" on Thu, November 9, 2023

Filed a patent for "circuit and method to set delay between two periodic signals with unknown phase relationship" on Thu, November 23, 2023