Synopsys

Filed a patent for "superconductive integrated circuit devices with on-chip testing" on Thu, February 27, 2025

Filed a patent for "improving coverage in functional verification by coordinated randomization of variables across multiple classes" on Thu, February 27, 2025

Filed a patent for "optical and manufacturing aware design flow for metasurfaces" on Thu, August 31, 2023

Filed a patent for "power efficient retention flip flop circuit" on Mon, June 12, 2023

Filed a patent for "bias cause reduction for localizing constraints" on Thu, January 30, 2025

Filed a patent for "application of machine learning techniques to intellectual property (ip) based data structure for functional safety analysis" on Thu, January 30, 2025

Filed a patent for "dynamic job dependency discovery and constraints generation to schedule eda workloads in cloud environments" on Thu, January 30, 2025

Filed a patent for "adaptive hardware tracing" on Thu, January 23, 2025

Filed a patent for "system level functional and performance verification across protocols/platforms using system analyzer" on Thu, January 23, 2025

Filed a patent for "output driver level-shifting latch circuit for dual-rail memory" on Thu, February 16, 2023

Filed a patent for "modeling mandrel tolerance in a design of a semiconductor device" on Fri, March 31, 2023

Filed a patent for "multi level loopback to enable automated testing of standalone connectivity controller" on Thu, April 13, 2023

Filed a patent for "tracking taint propagation in integrated circuit design" on Thu, December 26, 2024

Filed a patent for "field-programmable gate array (fpga) modular implementation" on Thu, January 2, 2025

Filed a patent for "timing and power modeling in flexmbff compilers" on Thu, January 2, 2025

Filed a patent for "automatic generation of multi-cycle path design constraint for forward annotation in integrated circuit design" on Thu, December 26, 2024

Filed a patent for "signal integrity monitoring system" on Thu, December 12, 2024

Filed a patent for "blinding countermeasure to secure multiplication operations against side channel attacks" on Thu, November 28, 2024

Filed a patent for "continuous time linear equalizer with programmable inductive high frequency boost" on Thu, June 1, 2023

Filed a patent for "independent emulation of separate portions of integrated circuit design" on Thu, November 28, 2024

Filed a patent for "independent emulation of separate portions of integrated circuit designs" on Fri, May 26, 2023

Filed a patent for "at-speed synchronous write-through operation for testing two-port memory" on Thu, March 9, 2023

Filed a patent for "synchronization of a transfer of data signals between circuits when a clock in a destination circuit is off" on Tue, March 14, 2023

Filed a patent for "peformance analysis using architecture model of processor architecture design" on Thu, October 24, 2024

Filed a patent for "constant, equal, or opposite registers or ports detection during logic synthesis" on Thu, October 24, 2024